Difference between revisions of "Datel Action Replay PC"

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PCB components:
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===PCB components:===
 
[[File:Action Replay PC PCB Front (with labels).jpeg|none|thumb|512x512px|The front side of the PCB, with labels (created by me)]]
 
[[File:Action Replay PC PCB Front (with labels).jpeg|none|thumb|512x512px|The front side of the PCB, with labels (created by me)]]
 +
<br />
 +
{| class="wikitable"
 +
|+
 +
!Name
 +
!Type
 +
!Manufacturer
 +
!Name/Value
 +
!Pins
 +
!Info
 +
!Notes
 +
|-
 +
|U1
 +
|EPROM
 +
|National Semiconductor
 +
|NM27C010
 +
|32
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|[http://pdf.datasheetcatalog.com/datasheet/nationalsemiconductor/DS010798.PDF datasheet]
 +
|
 +
|-
 +
|U2
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|Dual Flip-flop
 +
|
 +
|HC74A
 +
|14
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|[https://www.onsemi.com/pub/Collateral/MC74HC74A-D.PDF datasheet]
 +
|
 +
|-
 +
|U3
 +
|SRAM (8KB)
 +
|Hyundai
 +
|HM6264ALJ-10
 +
|28
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|[http://www.protronix.co.za/images/info/HM6264.pdf datasheet]
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|8 Kilobytes (8K words by 8-bits), 10 nanoseconds
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|-
 +
|U4
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|SRAM (128KB)
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|Hitachi
 +
|HM628128LFP-7
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|32
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|[https://www.digchip.com/datasheets/parts/datasheet/740/HM628128-pdf.php datasheet]
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|128 Kilobytes (8K words by 8-bits), 70 nanoseconds.
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L=low standby power (10 uW)
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|-
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|U5
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|555 Timer
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|STMicroelectronics
 +
|NE555
 +
|8
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|[http://www.ti.com/lit/ds/symlink/ne555.pdf datasheet]
 +
|
 +
|-
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|P1
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|Programmable Logic Array
 +
|AMD
 +
|PALCE20V8Q
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|24
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|[https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/PAL/PALCE20V8DataSheet.ashx?la=en datasheet]
 +
| rowspan="4" |The part number "PALCE20V8Q" decodes as:
 +
20 inputs, 8 flip/flops or outputs, Quarter power (55 mA Icc)
 +
|-
 +
|P2
 +
|Programmable Logic Array
 +
|AMD
 +
|PALCE20V8Q
 +
|24
 +
|[https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/PAL/PALCE20V8DataSheet.ashx?la=en datasheet]
 +
|-
 +
|P3
 +
|Programmable Logic Array
 +
|AMD
 +
|PALCE20V8Q
 +
|24
 +
|[https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/PAL/PALCE20V8DataSheet.ashx?la=en datasheet]
 +
|-
 +
|P4
 +
|Programmable Logic Array
 +
|AMD
 +
|PALCE20V8Q
 +
|24
 +
|[https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/PAL/PALCE20V8DataSheet.ashx?la=en datasheet]
 +
|-
 +
|C1
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|Capacitor
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|
 +
|
 +
|
 +
|
 +
|
 +
|-
 +
|C2
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|Capacitor
 +
|
 +
|
 +
|
 +
|
 +
|
 +
|-
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|C3
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|Capacitor
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|
 +
|1 uF / 63v
 +
|
 +
|
 +
|
 +
|-
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|D1
 +
|Diode
 +
|
 +
|
 +
|
 +
|
 +
|
 +
|-
 +
|D2
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|Diode
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|
 +
|
 +
|
 +
|
 +
|
 +
|-
 +
|R1
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|Resistor
 +
|
 +
|23k Ω
 +
|
 +
|
 +
|
 +
|-
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|R2
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|Resistor
 +
|
 +
|100k Ω
 +
|
 +
|
 +
|
 +
|-
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|R3
 +
|Resistor
 +
|
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|1K Ω
 +
|
 +
|
 +
|
 +
|-
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|J1
 +
|Connector
 +
|
 +
|DB-9 male
 +
|
 +
|
 +
|
 +
|}
 +
<br />
 +
 +
===Dip Switches / Jumpers:===
 +
The right 3 switches on the dip switch block (S4-S6) control the ROM address, while the left two switches control the IO port. S3, the third switch from the left, is not explained.
 +
 +
The 6 jumper pins at JP1-6 are used to set the IRQ. A vertical pin closing the top and bottom contact selects that IRQ
 +
 +
The manual lists the following values:
 +
{| class="wikitable"
 +
|+ROM Address
 +
!S4
 +
!S5
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!S6
 +
!Address
 +
|-
 +
|UP
 +
|UP
 +
|UP
 +
|DC00h
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|-
 +
|UP
 +
|DOWN
 +
|DOWN
 +
|D800h
 +
|-
 +
|DOWN
 +
|UP
 +
|DOWN
 +
|D400h
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|-
 +
|DOWN
 +
|UP
 +
|UP
 +
|D200h
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|-
 +
|UP
 +
|UP
 +
|DOWN
 +
|D000h
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|-
 +
|DOWN
 +
|DOWN
 +
|UP
 +
|CC00h
 +
|-
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|UP
 +
|DOWN
 +
|UP
 +
|C800h
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|-
 +
|DOWN
 +
|DOWN
 +
|DOWN
 +
|Unspecified (TODO: test)
 +
|}
 +
<br />
 +
{| class="wikitable"
 +
|+IO Port
 +
!S1
 +
!S2
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!Port
 +
|-
 +
|UP
 +
|UP
 +
|280h
 +
|-
 +
|DOWN
 +
|UP
 +
|290h
 +
|-
 +
|UP
 +
|DOWN
 +
|2A0h
 +
|-
 +
|DOWN
 +
|DOWN
 +
|2B0h
 +
|}<br />
 +
{| class="wikitable"
 +
|+IRQ
 +
!JP1
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!JP2
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!JP3
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!JP4
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!JP5
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!JP6
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|-
 +
|2
 +
|3
 +
|4
 +
|5
 +
|6
 +
|7
 +
|}
 +
 +
===Firmware===
 +
[https://archive.org/details/actionreplaypcfirmwarev4 The firmware] is 128 kilobytes, separated into 16 8KB Pages.
 +
Each page begins with a header that says which page it is, and mentions "(c) 1993 DATEL"
 +
 +
The AREPLAY.COM file has error strings for "Action Replay ram not switchable" and "Replay base address is not being shadowed" which suggests the larger SRAM chip (U4) is being used to shadow the EPROM at runtime.
 +
 +
There was at least one upgrade to the EPROM provided, which involved mailing out a replacement chip to users. 
 +
 +
<br />
 +
 +
===Anti-virus functionality===
 +
The firmware contains [https://twitter.com/Foone/status/1232324301656735745 the signature of 50 viruses], starting at offset 0x164D8.
 +
 +
Each name is proceeded by an 0xFE character, can be up to 26 letters long, and is padded with spaces.
 
<br />
 
<br />
 
===IBM Control===
 
===IBM Control===
<br />
+
The external "paddle" features a button, switch, and LED. The PCB inside calls it the "Datel IBM Control" <br />
 
{| class="wikitable"
 
{| class="wikitable"
 
|+DB9 (female)
 
|+DB9 (female)
Line 50: Line 313:
 
|Orange
 
|Orange
 
|}
 
|}
 +
 +
===Credits:===
 +
The firmware contains credits at offset 4F64: (TODO: See if you can view this from within the program)
 +
 +
                   Action  Replay  v1.3         (c) 1993 DATEL
 +
            Programmer ............................ Simon P.Constable
 +
            Project Manager ......................... Wayne H.Beckett
 +
            Design ................................... Mike J.Connors
 +
            ......................................... Wayne H.Beckett
 +
            Hardware .................................. Roy C.Harding
 +
            Support .................................... Mark Wallace
 +
            .......................................... Damon P.Barwin
 +
 +
 +
===Twitter Threads:===
 +
 +
*[https://twitter.com/Foone/status/1121138306673041408 When the Brandon unit first showed up on ebay] (April 24th, 2019)
 +
*[https://twitter.com/Foone/status/1230957506798612480 In response to the LGR video] (February 21st, 2020)
 +
*[https://twitter.com/Foone/status/1232324216650780674 Firmware image reverse engineering] (February 25th 2020)
 +
*[https://twitter.com/Foone/status/1233109217592004608 Status update after the card arrived] (February 27th, 2020)
 +
 +
===Related Links:===
 +
 +
*[https://www.youtube.com/watch?v=usaioMbE8EQ Lazy Game Reviews video on the Action Replay PC]
 +
*[https://archive.org/details/PCactionreplay1993 Manual, PCB images, and software]
 +
*[http://www.vcfed.org/forum/showthread.php?72650-Action-Replay-PC-(ISA-card)-manual-box-disk-PCB-scans VCFed thread]
 +
*[https://archive.org/details/actionreplaypcfirmwarev4 Version 4 firmware dump]
 +
 +
<br />

Latest revision as of 21:24, 6 March 2020

PCB components:

The front side of the PCB, with labels (created by me)


Name Type Manufacturer Name/Value Pins Info Notes
U1 EPROM National Semiconductor NM27C010 32 datasheet
U2 Dual Flip-flop HC74A 14 datasheet
U3 SRAM (8KB) Hyundai HM6264ALJ-10 28 datasheet 8 Kilobytes (8K words by 8-bits), 10 nanoseconds
U4 SRAM (128KB) Hitachi HM628128LFP-7 32 datasheet 128 Kilobytes (8K words by 8-bits), 70 nanoseconds.

L=low standby power (10 uW)

U5 555 Timer STMicroelectronics NE555 8 datasheet
P1 Programmable Logic Array AMD PALCE20V8Q 24 datasheet The part number "PALCE20V8Q" decodes as:

20 inputs, 8 flip/flops or outputs, Quarter power (55 mA Icc)

P2 Programmable Logic Array AMD PALCE20V8Q 24 datasheet
P3 Programmable Logic Array AMD PALCE20V8Q 24 datasheet
P4 Programmable Logic Array AMD PALCE20V8Q 24 datasheet
C1 Capacitor
C2 Capacitor
C3 Capacitor 1 uF / 63v
D1 Diode
D2 Diode
R1 Resistor 23k Ω
R2 Resistor 100k Ω
R3 Resistor 1K Ω
J1 Connector DB-9 male


Dip Switches / Jumpers:

The right 3 switches on the dip switch block (S4-S6) control the ROM address, while the left two switches control the IO port. S3, the third switch from the left, is not explained.

The 6 jumper pins at JP1-6 are used to set the IRQ. A vertical pin closing the top and bottom contact selects that IRQ

The manual lists the following values:

ROM Address
S4 S5 S6 Address
UP UP UP DC00h
UP DOWN DOWN D800h
DOWN UP DOWN D400h
DOWN UP UP D200h
UP UP DOWN D000h
DOWN DOWN UP CC00h
UP DOWN UP C800h
DOWN DOWN DOWN Unspecified (TODO: test)


IO Port
S1 S2 Port
UP UP 280h
DOWN UP 290h
UP DOWN 2A0h
DOWN DOWN 2B0h


IRQ
JP1 JP2 JP3 JP4 JP5 JP6
2 3 4 5 6 7

Firmware

The firmware is 128 kilobytes, separated into 16 8KB Pages. Each page begins with a header that says which page it is, and mentions "(c) 1993 DATEL"

The AREPLAY.COM file has error strings for "Action Replay ram not switchable" and "Replay base address is not being shadowed" which suggests the larger SRAM chip (U4) is being used to shadow the EPROM at runtime.

There was at least one upgrade to the EPROM provided, which involved mailing out a replacement chip to users.


Anti-virus functionality

The firmware contains the signature of 50 viruses, starting at offset 0x164D8.

Each name is proceeded by an 0xFE character, can be up to 26 letters long, and is padded with spaces.

IBM Control

The external "paddle" features a button, switch, and LED. The PCB inside calls it the "Datel IBM Control"

DB9 (female)
Connection Color
1 N/C N/A
2 LED Brown
3 Switch Black
4 Button Blue
5 Ground Green
6 N/C
7 N/C Yellow
8 N/C
9 N/C
Shell N/C Orange

Credits:

The firmware contains credits at offset 4F64: (TODO: See if you can view this from within the program)

                  Action  Replay  v1.3         (c) 1993 DATEL
           Programmer ............................ Simon P.Constable
           Project Manager ......................... Wayne H.Beckett
           Design ................................... Mike J.Connors
           ......................................... Wayne H.Beckett
           Hardware .................................. Roy C.Harding
           Support .................................... Mark Wallace
           .......................................... Damon P.Barwin


Twitter Threads:

Related Links: